[Max/MSP] bernoulli gate module in gen~

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Let's re-creat this famous bermoulli gate module named "branches" only with gen~.
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Timestamps:
0:00 start(speed 2x and full timestamp text is in video description)
0:12 BRANCHES module manual and some key words
2:15 generate impulses from phasor ramps
3:14 noise random gate but with impulses
5:54 just show you what this looks like(skip)
6:13 make branches --- latch mode in gen~
7:16 explainations on this process (skip)
8:12 I mean always less than 1(100%)
9:09 make prob% based on output A
10:33 this timestamp shows you what latch mode in gen~ looks like
10:43 back to manual again for toggle mode
11:15 basic concept on branches toggle mode
12:03 keep on...alternating...0 and 1s...
14:30 manual again for where the virtual coin is?
14:54 my comprehension on tossing the virtual coin
16:58 no receive impulse = no counting up = no more alternatings
18:31 random noise gate on receiving impulses
19:48 another boring explainations on random gating impulses(skip)
21:34 I mean countinue keep the gate open same as the previous one
21:57 showing you the gates goes up and down(skip)
22:32 should be called clock divider(knida messed up and I forgot pass through original impulses)
23:10 this timestamp shows you what toggle mode in gen~ looks like
24:05 "sub-octave" phasor(not 1 octave down but similiar to that)
24:54 GOD once said "Let there be sound" LOL
25:50 I'll show you what that really looks like with post in my youtube community
26:02 the problem occurs and why this problem occurs
26:48 I mean the sound goes to output B and no more switch back to A(prob is 0% for no alternatings)
28:34 fix this problem(but I recommend you leave that there because we are dealing with sounds,if there pass through impulses that not a problem)
31:43 bitcrushing? IDK......
32:30 combine two modes together and sort it out
37:06 my dad said we already have one branches module in home :)


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